// SPDX-License-Identifier: GPL-2.0-only
/* Copyright (c) 2023 Graphcore Ltd. */
/*
 * Automatically generated file.
 *
 * IPU architecture map.
 */

#include "ipu_arch_map.h"

struct ipu_arch_map ipu_arch_maps[4] = {
{ // ipu1
	.IPU_TILE_INSTANCES_WITH_REPAIR = 0x000004c0,
	.NLC_CSR_OFFSET = 0x00002000,
	.NLC_CSR_CORERRCNT_MASK = 0xffff,
	.NLC_CSR_CORERRCNT_SHIFT = 0x8,
	.NLC_CSR_CORERROR_MASK = 0x1,
	.NLC_CSR_CORERROR_SHIFT = 0x18,
	.NLC_CSR_IPUID_MASK = 0xf,
	.NLC_CSR_IPUID_SHIFT = 0x4,
	.NLC_LCSR_OFFSET = 0x00002004,
	.NLC_LCSR_COREDN_MASK = 0x1,
	.NLC_LCSR_COREDN_SHIFT = 0x1,
	.NLC_LCSR_LINKDN_MASK = 0x1,
	.NLC_LCSR_LINKDN_SHIFT = 0x0,
	.PCI_COMPLEX_CCSR_OFFSET = 0x00002084,
	.PCI_COMPLEX_CCSR_DUALPCI_MASK = 0x1,
	.PCI_COMPLEX_CCSR_DUALPCI_SHIFT = 0x2,
	.PCI_COMPLEX_CIUERRVR_OFFSET = 0x00002088,
	.PCI_COMPLEX_CIUERRVR_IPUSOFTERR_MASK = 0x1,
	.PCI_COMPLEX_CIUERRVR_IPUSOFTERR_SHIFT = 0x8,
	.PCI_COMPLEX_HSPGS1CR_OFFSET = 0x000020e8,
	.PCI_COMPLEX_HSPGS1CR_MARK_MASK = 0xffff,
	.PCI_COMPLEX_HSPGS1CR_MARK_SHIFT = 0x0,
	.PCI_COMPLEX_HSPGS1CR_NOTIFY_MASK = 0x1,
	.PCI_COMPLEX_HSPGS1CR_NOTIFY_SHIFT = 0x14,
	.PCI_COMPLEX_HSPGS1HILR_OFFSET = 0x00002120,
	.PCI_COMPLEX_HSPGS1LR_OFFSET = 0x000020f8,
	.PCI_COMPLEX_HSPGS2CR_OFFSET = 0x000020ec,
	.PCI_COMPLEX_HSPGS2CR_MARK_MASK = 0xffff,
	.PCI_COMPLEX_HSPGS2CR_MARK_SHIFT = 0x0,
	.PCI_COMPLEX_HSPGS2CR_NOTIFY_MASK = 0x1,
	.PCI_COMPLEX_HSPGS2CR_NOTIFY_SHIFT = 0x14,
	.PCI_COMPLEX_HSPGS2HILR_OFFSET = 0x00002124,
	.PCI_COMPLEX_HSPGS2LR_OFFSET = 0x000020fc,
	.PCI_COMPLEX_MCUCMDR_OFFSET = 0x000020a0,
	.PCI_COMPLEX_MCUDATR0_OFFSET = 0x000020a4,
	.PCI_COMPLEX_MCUDATR1_OFFSET = 0x000020a8,
	.PCI_COMPLEX_MCUDATR2_OFFSET = 0x000020ac,
	.PCI_COMPLEX_MCUDATR3_OFFSET = 0x000020b0,
	.PCI_COMPLEX_PCICMDR_OFFSET = 0x000020d4,
	.PCI_COMPLEX_PCIDATR0_OFFSET = 0x000020d8,
	.PCI_COMPLEX_PCIDATR1_OFFSET = 0x000020dc,
	.PCI_COMPLEX_PCIDATR2_OFFSET = 0x000020e0,
	.PCI_COMPLEX_PCIDATR3_OFFSET = 0x000020e4,
	.SOC_CBUS0_BASE = 0x00004000,
	.SOC_IPU_MEM_BASE = 0x00030000,
	.SOC_IPU_MEM_TILE_STRIDE = 0x00000040,
	.SOC_NLC_E_2A_BASE = 0x00019000,
	.SOC_NLC_E_2B_BASE = 0x00016c00,
	.SOC_NLC_E_2C_BASE = 0x00014800,
	.SOC_NLC_E_3A_BASE = 0x0001d800,
	.SOC_NLC_E_3B_BASE = 0x0001fc00,
	.SOC_NLC_E_3C_BASE = 0x00022000,
	.SOC_NLC_W_0B_BASE = 0x00010000,
	.SOC_NLC_W_0C_BASE = 0x00012400,
	.SOC_NLC_W_1B_BASE = 0x00006400,
	.SOC_NLC_W_1C_BASE = 0x00008800,
	.SS_IPUCLKCOUNTLSBR_OFFSET = 0x00004048,
	.SS_SIPUPLLCR_OFFSET = 0x00004038,
	.SS_SIPUPLLCR_IPUCLKCNTEN_MASK = 0x1,
	.SS_SIPUPLLCR_IPUCLKCNTEN_SHIFT = 0x1d,
	.TDBG_TDI_REGISTER_WIDTH = 0x00000004,
	.TDI_CTXT_STS_OFFSET = 0x00000000,
	.TDI_CTXT_STS_MERR_MASK = 0x1,
	.TDI_CTXT_STS_MERR_SHIFT = 0x1f,
},
{ // ipu2
	.IPU_TILE_INSTANCES_WITH_REPAIR = 0x000005c0,
	.NLC_CSR_OFFSET = 0x00002000,
	.NLC_CSR_CORERRCNT_MASK = 0xffff,
	.NLC_CSR_CORERRCNT_SHIFT = 0x8,
	.NLC_CSR_CORERROR_MASK = 0x1,
	.NLC_CSR_CORERROR_SHIFT = 0x18,
	.NLC_CSR_IPUID_MASK = 0xf,
	.NLC_CSR_IPUID_SHIFT = 0x4,
	.NLC_LCSR_OFFSET = 0x00002004,
	.NLC_LCSR_COREDN_MASK = 0x1,
	.NLC_LCSR_COREDN_SHIFT = 0x1,
	.NLC_LCSR_LINKDN_MASK = 0x1,
	.NLC_LCSR_LINKDN_SHIFT = 0x0,
	.PCI_COMPLEX_CCSR_OFFSET = 0x00002000,
	.PCI_COMPLEX_CCSR_DUALPCI_MASK = 0x1,
	.PCI_COMPLEX_CCSR_DUALPCI_SHIFT = 0x2,
	.PCI_COMPLEX_CCSR_HUGEPAGE_MASK = 0x1,
	.PCI_COMPLEX_CCSR_HUGEPAGE_SHIFT = 0x11,
	.PCI_COMPLEX_CIUERRVR_OFFSET = 0x00002004,
	.PCI_COMPLEX_CIUERRVR_IPUSOFTERR_MASK = 0x1,
	.PCI_COMPLEX_CIUERRVR_IPUSOFTERR_SHIFT = 0x8,
	.PCI_COMPLEX_EXCHWINDOWBASER_OFFSET = 0x00003044,
	.PCI_COMPLEX_EXCHWINDOWBASER_HEXOPT_MASK = 0x1,
	.PCI_COMPLEX_EXCHWINDOWBASER_HEXOPT_SHIFT = 0xb,
	.PCI_COMPLEX_HEXOPTUPDDATAHIR_OFFSET = 0x0000304c,
	.PCI_COMPLEX_HEXOPTUPDDATALOR_OFFSET = 0x00003050,
	.PCI_COMPLEX_HEXOPTUPDINDEXR_OFFSET = 0x00003048,
	.PCI_COMPLEX_HSPGS1CR_OFFSET = 0x0000302c,
	.PCI_COMPLEX_HSPGS1CR_MARK_MASK = 0xffff,
	.PCI_COMPLEX_HSPGS1CR_MARK_SHIFT = 0x0,
	.PCI_COMPLEX_HSPGS1CR_NOTIFY_MASK = 0x1,
	.PCI_COMPLEX_HSPGS1CR_NOTIFY_SHIFT = 0x14,
	.PCI_COMPLEX_HSPGS1HILR_OFFSET = 0x0000303c,
	.PCI_COMPLEX_HSPGS1LR_OFFSET = 0x00003034,
	.PCI_COMPLEX_HSPGS2CR_OFFSET = 0x00003030,
	.PCI_COMPLEX_HSPGS2CR_MARK_MASK = 0xffff,
	.PCI_COMPLEX_HSPGS2CR_MARK_SHIFT = 0x0,
	.PCI_COMPLEX_HSPGS2CR_NOTIFY_MASK = 0x1,
	.PCI_COMPLEX_HSPGS2CR_NOTIFY_SHIFT = 0x14,
	.PCI_COMPLEX_HSPGS2HILR_OFFSET = 0x00003040,
	.PCI_COMPLEX_HSPGS2LR_OFFSET = 0x00003038,
	.PCI_COMPLEX_MCUCMDR_OFFSET = 0x00003004,
	.PCI_COMPLEX_MCUDATR0_OFFSET = 0x00003008,
	.PCI_COMPLEX_MCUDATR1_OFFSET = 0x0000300c,
	.PCI_COMPLEX_MCUDATR2_OFFSET = 0x00003010,
	.PCI_COMPLEX_MCUDATR3_OFFSET = 0x00003014,
	.PCI_COMPLEX_PCICMDR_OFFSET = 0x00003018,
	.PCI_COMPLEX_PCIDATR0_OFFSET = 0x0000301c,
	.PCI_COMPLEX_PCIDATR1_OFFSET = 0x00003020,
	.PCI_COMPLEX_PCIDATR2_OFFSET = 0x00003024,
	.PCI_COMPLEX_PCIDATR3_OFFSET = 0x00003028,
	.PCI_COMPLEX_TILEUPDR_OFFSET = 0x00003054,
	.SOC_CBUS0_BASE = 0x00004000,
	.SOC_IPU_MEM_BASE = 0x00030000,
	.SOC_IPU_MEM_TILE_STRIDE = 0x00000040,
	.SOC_NLC_E_2A_BASE = 0x00019000,
	.SOC_NLC_E_2B_BASE = 0x00016c00,
	.SOC_NLC_E_2C_BASE = 0x00014800,
	.SOC_NLC_E_3A_BASE = 0x0001d800,
	.SOC_NLC_E_3B_BASE = 0x0001fc00,
	.SOC_NLC_E_3C_BASE = 0x00022000,
	.SOC_NLC_W_0B_BASE = 0x00010000,
	.SOC_NLC_W_0C_BASE = 0x00012400,
	.SOC_NLC_W_1B_BASE = 0x00008400,
	.SOC_NLC_W_1C_BASE = 0x0000a800,
	.SS_IPUCLKCOUNTLSBR_OFFSET = 0x00004044,
	.SS_SIPUPLLCR_OFFSET = 0x00004034,
	.SS_SIPUPLLCR_IPUCLKCNTEN_MASK = 0x1,
	.SS_SIPUPLLCR_IPUCLKCNTEN_SHIFT = 0x1e,
	.TDBG_TDI_REGISTER_WIDTH = 0x00000004,
	.TDI_CTXT_STS_OFFSET = 0x00000000,
	.TDI_CTXT_STS_MERR_MASK = 0x1,
	.TDI_CTXT_STS_MERR_SHIFT = 0x1f,
},
{ // ipu21
	.IPU_TILE_INSTANCES_WITH_REPAIR = 0x000005c0,
	.NLC_CSR_OFFSET = 0x00002000,
	.NLC_CSR_CORERRCNT_MASK = 0xffff,
	.NLC_CSR_CORERRCNT_SHIFT = 0x8,
	.NLC_CSR_CORERROR_MASK = 0x1,
	.NLC_CSR_CORERROR_SHIFT = 0x18,
	.NLC_CSR_IPUID_MASK = 0xf,
	.NLC_CSR_IPUID_SHIFT = 0x4,
	.NLC_LCSR_OFFSET = 0x00002004,
	.NLC_LCSR_COREDN_MASK = 0x1,
	.NLC_LCSR_COREDN_SHIFT = 0x1,
	.NLC_LCSR_LINKDN_MASK = 0x1,
	.NLC_LCSR_LINKDN_SHIFT = 0x0,
	.PCI_COMPLEX_CCSR_OFFSET = 0x00002000,
	.PCI_COMPLEX_CCSR_DUALPCI_MASK = 0x1,
	.PCI_COMPLEX_CCSR_DUALPCI_SHIFT = 0x2,
	.PCI_COMPLEX_CCSR_HUGEPAGE_MASK = 0x1,
	.PCI_COMPLEX_CCSR_HUGEPAGE_SHIFT = 0x11,
	.PCI_COMPLEX_CIUERRVR_OFFSET = 0x00002004,
	.PCI_COMPLEX_CIUERRVR_IPUSOFTERR_MASK = 0x1,
	.PCI_COMPLEX_CIUERRVR_IPUSOFTERR_SHIFT = 0x8,
	.PCI_COMPLEX_EXCHWINDOWBASER_OFFSET = 0x00003044,
	.PCI_COMPLEX_EXCHWINDOWBASER_HEXOPT_MASK = 0x1,
	.PCI_COMPLEX_EXCHWINDOWBASER_HEXOPT_SHIFT = 0xb,
	.PCI_COMPLEX_HEXOPTUPDDATAHIR_OFFSET = 0x0000304c,
	.PCI_COMPLEX_HEXOPTUPDDATALOR_OFFSET = 0x00003050,
	.PCI_COMPLEX_HEXOPTUPDINDEXR_OFFSET = 0x00003048,
	.PCI_COMPLEX_HSPGS1CR_OFFSET = 0x0000302c,
	.PCI_COMPLEX_HSPGS1CR_MARK_MASK = 0xffff,
	.PCI_COMPLEX_HSPGS1CR_MARK_SHIFT = 0x0,
	.PCI_COMPLEX_HSPGS1CR_NOTIFY_MASK = 0x1,
	.PCI_COMPLEX_HSPGS1CR_NOTIFY_SHIFT = 0x14,
	.PCI_COMPLEX_HSPGS1HILR_OFFSET = 0x0000303c,
	.PCI_COMPLEX_HSPGS1LR_OFFSET = 0x00003034,
	.PCI_COMPLEX_HSPGS2CR_OFFSET = 0x00003030,
	.PCI_COMPLEX_HSPGS2CR_MARK_MASK = 0xffff,
	.PCI_COMPLEX_HSPGS2CR_MARK_SHIFT = 0x0,
	.PCI_COMPLEX_HSPGS2CR_NOTIFY_MASK = 0x1,
	.PCI_COMPLEX_HSPGS2CR_NOTIFY_SHIFT = 0x14,
	.PCI_COMPLEX_HSPGS2HILR_OFFSET = 0x00003040,
	.PCI_COMPLEX_HSPGS2LR_OFFSET = 0x00003038,
	.PCI_COMPLEX_MCUCMDR_OFFSET = 0x00003004,
	.PCI_COMPLEX_MCUDATR0_OFFSET = 0x00003008,
	.PCI_COMPLEX_MCUDATR1_OFFSET = 0x0000300c,
	.PCI_COMPLEX_MCUDATR2_OFFSET = 0x00003010,
	.PCI_COMPLEX_MCUDATR3_OFFSET = 0x00003014,
	.PCI_COMPLEX_PCICMDR_OFFSET = 0x00003018,
	.PCI_COMPLEX_PCIDATR0_OFFSET = 0x0000301c,
	.PCI_COMPLEX_PCIDATR1_OFFSET = 0x00003020,
	.PCI_COMPLEX_PCIDATR2_OFFSET = 0x00003024,
	.PCI_COMPLEX_PCIDATR3_OFFSET = 0x00003028,
	.PCI_COMPLEX_TILEUPDR_OFFSET = 0x00003054,
	.SOC_CBUS0_BASE = 0x00004000,
	.SOC_IPU_MEM_BASE = 0x00030000,
	.SOC_IPU_MEM_TILE_STRIDE = 0x00000040,
	.SOC_NLC_E_2A_BASE = 0x00019000,
	.SOC_NLC_E_2B_BASE = 0x00016c00,
	.SOC_NLC_E_2C_BASE = 0x00014800,
	.SOC_NLC_E_3A_BASE = 0x0001d800,
	.SOC_NLC_E_3B_BASE = 0x0001fc00,
	.SOC_NLC_E_3C_BASE = 0x00022000,
	.SOC_NLC_W_0B_BASE = 0x00010000,
	.SOC_NLC_W_0C_BASE = 0x00012400,
	.SOC_NLC_W_1B_BASE = 0x00008400,
	.SOC_NLC_W_1C_BASE = 0x0000a800,
	.SS_IPUCLKCOUNTLSBR_OFFSET = 0x00004044,
	.SS_SIPUPLLCR_OFFSET = 0x00004034,
	.SS_SIPUPLLCR_IPUCLKCNTEN_MASK = 0x1,
	.SS_SIPUPLLCR_IPUCLKCNTEN_SHIFT = 0x1e,
	.TDBG_TDI_REGISTER_WIDTH = 0x00000004,
	.TDI_CTXT_STS_OFFSET = 0x00000000,
	.TDI_CTXT_STS_MERR_MASK = 0x1,
	.TDI_CTXT_STS_MERR_SHIFT = 0x1f,
},
{ // ipu30
	.IPU_TILE_INSTANCES_WITH_REPAIR = 0x000003c0,
	.NLC_CSR_OFFSET = 0x00002000,
	.NLC_CSR_CORERRCNT_MASK = 0xffff,
	.NLC_CSR_CORERRCNT_SHIFT = 0x8,
	.NLC_CSR_CORERROR_MASK = 0x1,
	.NLC_CSR_CORERROR_SHIFT = 0x18,
	.NLC_CSR_IPUID_MASK = 0xf,
	.NLC_CSR_IPUID_SHIFT = 0x4,
	.NLC_LCSR_OFFSET = 0x00002004,
	.NLC_LCSR_COREDN_MASK = 0x1,
	.NLC_LCSR_COREDN_SHIFT = 0x1,
	.NLC_LCSR_LINKDN_MASK = 0x1,
	.NLC_LCSR_LINKDN_SHIFT = 0x0,
	.PCI_COMPLEX_CCSR_OFFSET = 0x00002000,
	.PCI_COMPLEX_CCSR_DUALPCI_MASK = 0x1,
	.PCI_COMPLEX_CCSR_DUALPCI_SHIFT = 0x2,
	.PCI_COMPLEX_CCSR_HUGEPAGE_MASK = 0x1,
	.PCI_COMPLEX_CCSR_HUGEPAGE_SHIFT = 0x11,
	.PCI_COMPLEX_CIUERRVR_OFFSET = 0x00002004,
	.PCI_COMPLEX_CIUERRVR_IPUSOFTERR_MASK = 0x1,
	.PCI_COMPLEX_CIUERRVR_IPUSOFTERR_SHIFT = 0x8,
	.PCI_COMPLEX_EXCHWINDOWBASER_OFFSET = 0x00003044,
	.PCI_COMPLEX_EXCHWINDOWBASER_HEXOPT_MASK = 0x1,
	.PCI_COMPLEX_EXCHWINDOWBASER_HEXOPT_SHIFT = 0xb,
	.PCI_COMPLEX_HEXOPTUPDDATAHIR_OFFSET = 0x0000304c,
	.PCI_COMPLEX_HEXOPTUPDDATALOR_OFFSET = 0x00003050,
	.PCI_COMPLEX_HEXOPTUPDINDEXR_OFFSET = 0x00003048,
	.PCI_COMPLEX_HSPGS1CR_OFFSET = 0x0000302c,
	.PCI_COMPLEX_HSPGS1CR_MARK_MASK = 0xffff,
	.PCI_COMPLEX_HSPGS1CR_MARK_SHIFT = 0x0,
	.PCI_COMPLEX_HSPGS1CR_NOTIFY_MASK = 0x1,
	.PCI_COMPLEX_HSPGS1CR_NOTIFY_SHIFT = 0x14,
	.PCI_COMPLEX_HSPGS1HILR_OFFSET = 0x0000303c,
	.PCI_COMPLEX_HSPGS1LR_OFFSET = 0x00003034,
	.PCI_COMPLEX_HSPGS2CR_OFFSET = 0x00003030,
	.PCI_COMPLEX_HSPGS2CR_MARK_MASK = 0xffff,
	.PCI_COMPLEX_HSPGS2CR_MARK_SHIFT = 0x0,
	.PCI_COMPLEX_HSPGS2CR_NOTIFY_MASK = 0x1,
	.PCI_COMPLEX_HSPGS2CR_NOTIFY_SHIFT = 0x14,
	.PCI_COMPLEX_HSPGS2HILR_OFFSET = 0x00003040,
	.PCI_COMPLEX_HSPGS2LR_OFFSET = 0x00003038,
	.PCI_COMPLEX_MCUCMDR_OFFSET = 0x00003004,
	.PCI_COMPLEX_MCUDATR0_OFFSET = 0x00003008,
	.PCI_COMPLEX_MCUDATR1_OFFSET = 0x0000300c,
	.PCI_COMPLEX_MCUDATR2_OFFSET = 0x00003010,
	.PCI_COMPLEX_MCUDATR3_OFFSET = 0x00003014,
	.PCI_COMPLEX_PCICMDR_OFFSET = 0x00003018,
	.PCI_COMPLEX_PCIDATR0_OFFSET = 0x0000301c,
	.PCI_COMPLEX_PCIDATR1_OFFSET = 0x00003020,
	.PCI_COMPLEX_PCIDATR2_OFFSET = 0x00003024,
	.PCI_COMPLEX_PCIDATR3_OFFSET = 0x00003028,
	.PCI_COMPLEX_TILEUPDR_OFFSET = 0x00003054,
	.SOC_CBUS0_BASE = 0x00004000,
	.SOC_IPU_MEM_BASE = 0x00030000,
	.SOC_IPU_MEM_TILE_STRIDE = 0x00000040,
	.SOC_NLC_E_2A_BASE = 0x00019000,
	.SOC_NLC_E_2B_BASE = 0x00016c00,
	.SOC_NLC_E_2C_BASE = 0x00014800,
	.SOC_NLC_E_3A_BASE = 0x0001d800,
	.SOC_NLC_E_3B_BASE = 0x0001fc00,
	.SOC_NLC_E_3C_BASE = 0x00022000,
	.SOC_NLC_W_0B_BASE = 0x00010000,
	.SOC_NLC_W_0C_BASE = 0x00012400,
	.SOC_NLC_W_1B_BASE = 0x00008400,
	.SOC_NLC_W_1C_BASE = 0x0000a800,
	.SS_IPUCLKCOUNTLSBR_OFFSET = 0x00004044,
	.SS_SIPUPLLCR_OFFSET = 0x00004034,
	.SS_SIPUPLLCR_IPUCLKCNTEN_MASK = 0x1,
	.SS_SIPUPLLCR_IPUCLKCNTEN_SHIFT = 0x1e,
	.TDBG_TDI_REGISTER_WIDTH = 0x00000004,
	.TDI_CTXT_STS_OFFSET = 0x00000000,
	.TDI_CTXT_STS_MERR_MASK = 0x1,
	.TDI_CTXT_STS_MERR_SHIFT = 0x1f,
},
};