/srv/home/.cache/ipu-stack/kernels/4123de2d1016f3fdbbcec54d6828d99904de2a8edf3f6569b67a5dfe4f6da8ea/kernel.o:	file format elf32-colossus

Disassembly of section .text.rearrange_row_major_to_amp_f16_o0_r31_p31_c72_p80:

00000000 <rearrange_row_major_to_amp_f16_o0_r31_p31_c72_p80>:
       0: f0 ff bb 22  	add $m11, $m11, 0xfff0
       4: 02 f0 b9 4f  	st32 $m9, $m11, $m15, 0x2
       8: 00 f0 b3 4f  	st32 $m3, $m11, $m15, 0x0
       c: 01 f0 b2 4f  	st32 $m2, $m11, $m15, 0x1
      10: 00 00 00 19  	setzi $m0, 0x0
      14: 00 b0 00 15  	runall $m0, $m11, 0x0
      18: 02 00 80 41  	<unknown>
      1c: 00 73 40 44  	mul $m0, $m4, $m7
      20: 01 a0 00 42  	shl $m0, $m0, 0x1
      24: 31 00 30 44  	add $m3, $m3, $m0
      28: 05 a0 50 42  	shl $m0, $m5, 0x5
      2c: 21 00 20 44  	add $m2, $m2, $m0
      30: ff ff 99 22  	add $m9, $m9, 0xffff
      34: 00 00 90 11  	brnz $m9, 0x0 <rearrange_row_major_to_amp_f16_o0_r31_p31_c72_p80>
      38: 10 00 bb 22  	add $m11, $m11, 0x10
      3c: 00 00 a0 43  	br $m10
      40: 00 f0 d0 01  	ld32 $m0, $m13, $m15, 0x0
      44: 01 f0 d1 01  	ld32 $m1, $m13, $m15, 0x1
      48: 02 f0 d4 01  	ld32 $m4, $m13, $m15, 0x2
      4c: e0 03 50 19  	setzi $m5, 0x3e0
      50: 40 53 40 44  	mul $m4, $m4, $m5
      54: e0 ff 44 22  	add $m4, $m4, 0xffe0
      58: 01 00 06 41  	get $m6, 0x1
      5c: 07 80 66 42  	and $m6, $m6, 0x7
      60: 48 00 20 19  	setzi $m2, 0x48
      64: 90 23 60 44  	mul $m9, $m6, $m2
      68: 01 a0 99 42  	shl $m9, $m9, 0x1
      6c: 91 90 00 44  	add $m9, $m0, $m9
      70: 00 00 6a 22  	add $m10, $m6, 0x0
      74: 05 a0 aa 42  	shl $m10, $m10, 0x5
      78: a1 a0 10 44  	add $m10, $m1, $m10
      7c: 1f 00 30 19  	setzi $m3, 0x1f
      80: 31 32 60 44  	cmpult $m3, $m6, $m3
      84: 00 00 30 13  	brz $m3, 0x0 <rearrange_row_major_to_amp_f16_o0_r31_p31_c72_p80>
      88: 04 00 70 19  	setzi $m7, 0x4
      8c: 01 92 f0 1e  	ld64step $a0:1, $m15, $m9+=, 0x1
      90: 00 a1 f1 5c  	st64step $a0:1, $m15, $m10+=, 0x1
      94: 01 92 f0 1e  	ld64step $a0:1, $m15, $m9+=, 0x1
      98: 00 a1 f1 5c  	st64step $a0:1, $m15, $m10+=, 0x1
      9c: 01 92 f0 1e  	ld64step $a0:1, $m15, $m9+=, 0x1
      a0: 00 a1 f1 5c  	st64step $a0:1, $m15, $m10+=, 0x1
      a4: 01 92 f0 1e  	ld64step $a0:1, $m15, $m9+=, 0x1
      a8: 00 a1 f1 5c  	st64step $a0:1, $m15, $m10+=, 0x1
      ac: a1 40 a0 44  	add $m10, $m10, $m4
      b0: ff ff 77 22  	add $m7, $m7, 0xffff
      b4: 00 00 70 11  	brnz $m7, 0x0 <rearrange_row_major_to_amp_f16_o0_r31_p31_c72_p80>
      b8: 00 f0 90 08  	ld32 $a0, $m9, $m15, 0x0
      bc: 00 f0 a0 5e  	st32 $a0, $m10, $m15, 0x0
      c0: 04 00 99 22  	add $m9, $m9, 0x4
      c4: 04 00 aa 22  	add $m10, $m10, 0x4
      c8: 00 f0 90 08  	ld32 $a0, $m9, $m15, 0x0
      cc: 00 f0 a0 5e  	st32 $a0, $m10, $m15, 0x0
      d0: 04 00 99 22  	add $m9, $m9, 0x4
      d4: 04 00 aa 22  	add $m10, $m10, 0x4
      d8: 00 f0 90 08  	ld32 $a0, $m9, $m15, 0x0
      dc: 00 f0 a0 5e  	st32 $a0, $m10, $m15, 0x0
      e0: 04 00 99 22  	add $m9, $m9, 0x4
      e4: 04 00 aa 22  	add $m10, $m10, 0x4
      e8: 00 f0 90 08  	ld32 $a0, $m9, $m15, 0x0
      ec: 00 f0 a0 5e  	st32 $a0, $m10, $m15, 0x0
      f0: 04 00 99 22  	add $m9, $m9, 0x4
      f4: 04 00 aa 22  	add $m10, $m10, 0x4
      f8: 00 fe f0 58  	zero	$a0
      fc: 00 f0 a0 5e  	st32 $a0, $m10, $m15, 0x0
     100: 04 00 aa 22  	add $m10, $m10, 0x4
     104: 00 f0 a0 5e  	st32 $a0, $m10, $m15, 0x0
     108: 04 00 aa 22  	add $m10, $m10, 0x4
     10c: 00 f0 a0 5e  	st32 $a0, $m10, $m15, 0x0
     110: 04 00 aa 22  	add $m10, $m10, 0x4
     114: 00 f0 a0 5e  	st32 $a0, $m10, $m15, 0x0
     118: 04 00 aa 22  	add $m10, $m10, 0x4
     11c: a1 40 a0 44  	add $m10, $m10, $m4
     120: 00 00 80 40  	bri 0x0 <rearrange_row_major_to_amp_f16_o0_r31_p31_c72_p80>
     124: 05 00 70 19  	setzi $m7, 0x5
     128: 00 fe f0 58  	zero	$a0
     12c: 00 f0 a0 5e  	st32 $a0, $m10, $m15, 0x0
     130: 04 00 aa 22  	add $m10, $m10, 0x4
     134: 00 f0 a0 5e  	st32 $a0, $m10, $m15, 0x0
     138: 04 00 aa 22  	add $m10, $m10, 0x4
     13c: 00 f0 a0 5e  	st32 $a0, $m10, $m15, 0x0
     140: 04 00 aa 22  	add $m10, $m10, 0x4
     144: 00 f0 a0 5e  	st32 $a0, $m10, $m15, 0x0
     148: 04 00 aa 22  	add $m10, $m10, 0x4
     14c: 00 f0 a0 5e  	st32 $a0, $m10, $m15, 0x0
     150: 04 00 aa 22  	add $m10, $m10, 0x4
     154: 00 f0 a0 5e  	st32 $a0, $m10, $m15, 0x0
     158: 04 00 aa 22  	add $m10, $m10, 0x4
     15c: 00 f0 a0 5e  	st32 $a0, $m10, $m15, 0x0
     160: 04 00 aa 22  	add $m10, $m10, 0x4
     164: 00 f0 a0 5e  	st32 $a0, $m10, $m15, 0x0
     168: 04 00 aa 22  	add $m10, $m10, 0x4
     16c: a1 40 a0 44  	add $m10, $m10, $m4
     170: ff ff 77 22  	add $m7, $m7, 0xffff
     174: 00 00 70 11  	brnz $m7, 0x0 <rearrange_row_major_to_amp_f16_o0_r31_p31_c72_p80>
     178: 06 00 66 22  	add $m6, $m6, 0x6
     17c: 1f 00 20 19  	setzi $m2, 0x1f
     180: 21 22 60 44  	cmpult $m2, $m6, $m2
     184: 00 00 20 11  	brnz $m2, 0x0 <rearrange_row_major_to_amp_f16_o0_r31_p31_c72_p80>
     188: 00 40 f0 43  	exitz $m15