# andc $mDst0 $mSrc0 $mSrc1

32-bit bitwise logical AND Complement


## $mDst0

## $mSrc0

## $mSrc1

# andc $mDst0 $mSrc0 zimm12

32-bit bitwise logical AND Complement


## $mDst0

## $mSrc0

## zimm12

# andc $aDst0 $aSrc0 $aSrc1

32-bit bitwise logical AND Complement


## $aDst0

## $aSrc0

## $aSrc1

# andc $aDst0 $aSrc0 zimm12

32-bit bitwise logical AND Complement


## $aDst0

## $aSrc0

## zimm12

# andc $aDst0 $aSrc0 immz12

32-bit bitwise logical AND Complement


## $aDst0

## $aSrc0

## immz12