//===-- ColossusSubtarget.h - Define Subtarget for the Colossus -*- C++ -*-===//
//    Copyright (c) 2023 Graphcore Ltd. All Rights Reserved.
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//
//        http://www.apache.org/licenses/LICENSE-2.0
//
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//     distributed under the License is distributed on an "AS IS" BASIS,
//     WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
//     See the License for the specific language governing permissions and
//     limitations under the License.
// --- LLVM Exceptions to the Apache 2.0 License ----
//
// As an exception, if, as a result of your compiling your source code, portions
// of this Software are embedded into an Object form of such source code, you
// may redistribute such embedded portions in such Object form without complying
// with the conditions of Sections 4(a), 4(b) and 4(d) of the License.
//
// In addition, if you combine or link compiled forms of this Software with
// software that is licensed under the GPLv2 ("Combined Software") and if a
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// 3), the indemnity provision (Section 9) or other Section of the License
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//
//===----------------------------------------------------------------------===//
//
// This file declares the Colossus specific subclass of TargetSubtargetInfo.
//
//===----------------------------------------------------------------------===//

#ifndef LLVM_LIB_TARGET_COLOSSUS_COLOSSUSSUBTARGET_H
#define LLVM_LIB_TARGET_COLOSSUS_COLOSSUSSUBTARGET_H

#include "ColossusFrameLowering.h"
#include "ColossusISelLowering.h"
#include "ColossusInstrInfo.h"
#include "ColossusSelectionDAGInfo.h"
#include "llvm/CodeGen/MachineScheduler.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/Target/TargetMachine.h"
#include <ipu_arch_info/ipuArchInfo.h>
#include <string>

#define GET_SUBTARGETINFO_HEADER
#include "ColossusGenSubtargetInfo.inc"

namespace llvm {
class StringRef;

class ColossusSubtarget : public ColossusGenSubtargetInfo {
  virtual void anchor();
  ColossusInstrInfo InstrInfo;
  std::unique_ptr<ColossusFrameLowering> FrameLowering;
  std::unique_ptr<ColossusTargetLowering> TLInfo;
  ColossusSelectionDAGInfo TSInfo;

  enum ColossusArchEnum { Ipu1, Ipu2, Ipu21 };

  enum ColossusExecutionModeEnum {
    Worker,
    Supervisor,
    Both
  };

  ColossusArchEnum ColossusArchVersion;
  ColossusExecutionModeEnum ExecutionMode;

public:
  /// This constructor initializes the data members to match that
  /// of the specified triple.
  ColossusSubtarget(const Triple &TT, const std::string &CPU,
                    const std::string &TuneCPU, const std::string &FS,
                    const TargetMachine &TM);

  /// ParseSubtargetFeatures - Parses features string setting specified
  /// subtarget options.  Definition of function is auto generated by tblgen.
  void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS);

  const ColossusInstrInfo *getInstrInfo() const override {
    return &InstrInfo;
  }
  const ColossusFrameLowering *getFrameLowering() const override {
    return FrameLowering.get();
  }
  const ColossusTargetLowering *getTargetLowering() const override {
    return TLInfo.get();
  }
  const ColossusSelectionDAGInfo *getSelectionDAGInfo() const override {
    return &TSInfo;
  }
  const TargetRegisterInfo *getRegisterInfo() const override {
    return &InstrInfo.getRegisterInfo();
  }

  bool enableSubRegLiveness() const override { return true; }

  bool isWorkerMode() const { return ExecutionMode == Worker; }
  bool isSupervisorMode() const { return ExecutionMode == Supervisor; }
  bool isBothMode() const { return ExecutionMode == Both; }

  bool isIpu2Plus() const { return ColossusArchVersion >= Ipu2; }
  bool isIpu1And2() const {
    return (ColossusArchVersion == Ipu1 || ColossusArchVersion == Ipu2 ||
            ColossusArchVersion == Ipu21);
  }

  bool isSameExecutionMode(const ColossusSubtarget &CST) const {
    return ExecutionMode == CST.ExecutionMode;
  }
  StringRef getExecutionModeName() const {
    switch (ExecutionMode) {
    case ColossusExecutionModeEnum::Worker:
      return "worker";
    case ColossusExecutionModeEnum::Supervisor:
      return "supervisor";
    case ColossusExecutionModeEnum::Both:
      return "both";
    }
    llvm_unreachable("unhandled execution mode");
  }

  StringRef getArchName() const {
    switch (ColossusArchVersion) {
    default:
    case ColossusArchEnum::Ipu1:
      return "ipu1";
    case ColossusArchEnum::Ipu2:
      return "ipu2";
    case ColossusArchEnum::Ipu21:
      return "ipu21";
    }
  }

  void overrideSchedPolicy(MachineSchedPolicy &Policy,
                           unsigned NumRegionInstrs) const override {
    // Top-down scheduler gives the best results in bundling in poplibs.
    Policy.OnlyTopDown = true;
    Policy.OnlyBottomUp = false;
    Policy.DisableLatencyHeuristic = false;
  }

  // Enable machine instruction scheduler by default and post register
  // allocator machine instruction scheduler if enabled by scheduling model.
  // It can be disabled on the command-line using -enable-misched=false.
  bool enableMachineScheduler() const override { return true; }
  bool enablePostRAScheduler() const override {
    return !enableMachineScheduler() && getSchedModel().PostRAScheduler;
  }
  bool enablePostRAMachineScheduler() const override {
    return enableMachineScheduler() && getSchedModel().PostRAScheduler;
  }

  bool useAA() const override { return true; };
  bool enableMachinePipeliner() const override { return true; }
  bool useDFAforSMS() const override { return false; }

  const IPUArchInfo &getIPUArchInfo() const {
    return ipuArchInfoByName(getArchName().str());
  }
};
} // End llvm namespace

#endif