; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -march=colossus -colossus-coissue=false -mattr=+ipu1 | FileCheck %s
; RUN: llc < %s -march=colossus -colossus-coissue=false -mattr=+ipu2 | FileCheck %s

target triple = "colossus-graphcore--elf"

define <2 x i1> @icmp_eq_v2i32(<2 x i32> %lhs, <2 x i32> %rhs) {
; CHECK-LABEL: icmp_eq_v2i32:
; CHECK:       # %bb.0:
; CHECK-NEXT:    cmpeq $m0, $m0, $m2
; CHECK-NEXT:    shl $m0, $m0, 31
; CHECK-NEXT:    shrs $m0, $m0, 31
; CHECK-NEXT:    cmpeq $m1, $m1, $m3
; CHECK-NEXT:    shl $m1, $m1, 31
; CHECK-NEXT:    shrs $m1, $m1, 31
; CHECK-NEXT:    sort4x16lo $m0, $m0, $m1
; CHECK-NEXT:    br $m10
  %retval = icmp eq <2 x i32> %lhs, %rhs
  ret <2 x i1> %retval
}

define <2 x i1> @icmp_ne_v2i32(<2 x i32> %lhs, <2 x i32> %rhs) {
; CHECK-LABEL: icmp_ne_v2i32:
; CHECK:       # %bb.0:
; CHECK-NEXT:    cmpne $m0, $m0, $m2
; CHECK-NEXT:    shl $m0, $m0, 31
; CHECK-NEXT:    shrs $m0, $m0, 31
; CHECK-NEXT:    cmpne $m1, $m1, $m3
; CHECK-NEXT:    shl $m1, $m1, 31
; CHECK-NEXT:    shrs $m1, $m1, 31
; CHECK-NEXT:    sort4x16lo $m0, $m0, $m1
; CHECK-NEXT:    br $m10
  %retval = icmp ne <2 x i32> %lhs, %rhs
  ret <2 x i1> %retval
}

define <2 x i1> @icmp_ugt_v2i32(<2 x i32> %lhs, <2 x i32> %rhs) {
; CHECK-LABEL: icmp_ugt_v2i32:
; CHECK:       # %bb.0:
; CHECK-NEXT:    cmpult $m0, $m2, $m0
; CHECK-NEXT:    shl $m0, $m0, 31
; CHECK-NEXT:    shrs $m0, $m0, 31
; CHECK-NEXT:    cmpult $m1, $m3, $m1
; CHECK-NEXT:    shl $m1, $m1, 31
; CHECK-NEXT:    shrs $m1, $m1, 31
; CHECK-NEXT:    sort4x16lo $m0, $m0, $m1
; CHECK-NEXT:    br $m10
  %retval = icmp ugt <2 x i32> %lhs, %rhs
  ret <2 x i1> %retval
}

define <2 x i1> @icmp_uge_v2i32(<2 x i32> %lhs, <2 x i32> %rhs) {
; CHECK-LABEL: icmp_uge_v2i32:
; CHECK:       # %bb.0:
; CHECK-NEXT:    cmpult $m0, $m0, $m2
; CHECK-NEXT:    cmpeq $m0, $m0, 0
; CHECK-NEXT:    shl $m0, $m0, 31
; CHECK-NEXT:    shrs $m0, $m0, 31
; CHECK-NEXT:    cmpult $m1, $m1, $m3
; CHECK-NEXT:    cmpeq $m1, $m1, 0
; CHECK-NEXT:    shl $m1, $m1, 31
; CHECK-NEXT:    shrs $m1, $m1, 31
; CHECK-NEXT:    sort4x16lo $m0, $m0, $m1
; CHECK-NEXT:    br $m10
  %retval = icmp uge <2 x i32> %lhs, %rhs
  ret <2 x i1> %retval
}

define <2 x i1> @icmp_ult_v2i32(<2 x i32> %lhs, <2 x i32> %rhs) {
; CHECK-LABEL: icmp_ult_v2i32:
; CHECK:       # %bb.0:
; CHECK-NEXT:    cmpult $m0, $m0, $m2
; CHECK-NEXT:    shl $m0, $m0, 31
; CHECK-NEXT:    shrs $m0, $m0, 31
; CHECK-NEXT:    cmpult $m1, $m1, $m3
; CHECK-NEXT:    shl $m1, $m1, 31
; CHECK-NEXT:    shrs $m1, $m1, 31
; CHECK-NEXT:    sort4x16lo $m0, $m0, $m1
; CHECK-NEXT:    br $m10
  %retval = icmp ult <2 x i32> %lhs, %rhs
  ret <2 x i1> %retval
}

define <2 x i1> @icmp_ule_v2i32(<2 x i32> %lhs, <2 x i32> %rhs) {
; CHECK-LABEL: icmp_ule_v2i32:
; CHECK:       # %bb.0:
; CHECK-NEXT:    cmpult $m0, $m2, $m0
; CHECK-NEXT:    cmpeq $m0, $m0, 0
; CHECK-NEXT:    shl $m0, $m0, 31
; CHECK-NEXT:    shrs $m0, $m0, 31
; CHECK-NEXT:    cmpult $m1, $m3, $m1
; CHECK-NEXT:    cmpeq $m1, $m1, 0
; CHECK-NEXT:    shl $m1, $m1, 31
; CHECK-NEXT:    shrs $m1, $m1, 31
; CHECK-NEXT:    sort4x16lo $m0, $m0, $m1
; CHECK-NEXT:    br $m10
  %retval = icmp ule <2 x i32> %lhs, %rhs
  ret <2 x i1> %retval
}

define <2 x i1> @icmp_sgt_v2i32(<2 x i32> %lhs, <2 x i32> %rhs) {
; CHECK-LABEL: icmp_sgt_v2i32:
; CHECK:       # %bb.0:
; CHECK-NEXT:    cmpslt $m0, $m2, $m0
; CHECK-NEXT:    shl $m0, $m0, 31
; CHECK-NEXT:    shrs $m0, $m0, 31
; CHECK-NEXT:    cmpslt $m1, $m3, $m1
; CHECK-NEXT:    shl $m1, $m1, 31
; CHECK-NEXT:    shrs $m1, $m1, 31
; CHECK-NEXT:    sort4x16lo $m0, $m0, $m1
; CHECK-NEXT:    br $m10
  %retval = icmp sgt <2 x i32> %lhs, %rhs
  ret <2 x i1> %retval
}

define <2 x i1> @icmp_sge_v2i32(<2 x i32> %lhs, <2 x i32> %rhs) {
; CHECK-LABEL: icmp_sge_v2i32:
; CHECK:       # %bb.0:
; CHECK-NEXT:    cmpslt $m0, $m0, $m2
; CHECK-NEXT:    cmpeq $m0, $m0, 0
; CHECK-NEXT:    shl $m0, $m0, 31
; CHECK-NEXT:    shrs $m0, $m0, 31
; CHECK-NEXT:    cmpslt $m1, $m1, $m3
; CHECK-NEXT:    cmpeq $m1, $m1, 0
; CHECK-NEXT:    shl $m1, $m1, 31
; CHECK-NEXT:    shrs $m1, $m1, 31
; CHECK-NEXT:    sort4x16lo $m0, $m0, $m1
; CHECK-NEXT:    br $m10
  %retval = icmp sge <2 x i32> %lhs, %rhs
  ret <2 x i1> %retval
}

define <2 x i1> @icmp_slt_v2i32(<2 x i32> %lhs, <2 x i32> %rhs) {
; CHECK-LABEL: icmp_slt_v2i32:
; CHECK:       # %bb.0:
; CHECK-NEXT:    cmpslt $m0, $m0, $m2
; CHECK-NEXT:    shl $m0, $m0, 31
; CHECK-NEXT:    shrs $m0, $m0, 31
; CHECK-NEXT:    cmpslt $m1, $m1, $m3
; CHECK-NEXT:    shl $m1, $m1, 31
; CHECK-NEXT:    shrs $m1, $m1, 31
; CHECK-NEXT:    sort4x16lo $m0, $m0, $m1
; CHECK-NEXT:    br $m10
  %retval = icmp slt <2 x i32> %lhs, %rhs
  ret <2 x i1> %retval
}

define <2 x i1> @icmp_sle_v2i32(<2 x i32> %lhs, <2 x i32> %rhs) {
; CHECK-LABEL: icmp_sle_v2i32:
; CHECK:       # %bb.0:
; CHECK-NEXT:    cmpslt $m0, $m2, $m0
; CHECK-NEXT:    cmpeq $m0, $m0, 0
; CHECK-NEXT:    shl $m0, $m0, 31
; CHECK-NEXT:    shrs $m0, $m0, 31
; CHECK-NEXT:    cmpslt $m1, $m3, $m1
; CHECK-NEXT:    cmpeq $m1, $m1, 0
; CHECK-NEXT:    shl $m1, $m1, 31
; CHECK-NEXT:    shrs $m1, $m1, 31
; CHECK-NEXT:    sort4x16lo $m0, $m0, $m1
; CHECK-NEXT:    br $m10
  %retval = icmp sle <2 x i32> %lhs, %rhs
  ret <2 x i1> %retval
}