; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --remove_checks
; RUN: llc < %s -mtriple=colossus -colossus-coissue=false -mattr=+ipu1 | FileCheck %s
; RUN: llc < %s -mtriple=colossus -colossus-coissue=false -mattr=+ipu2 | FileCheck %s


define <4 x float> @test_select_reg(i1 %cond, <4 x float> %t, <4 x float> %f) {
; CHECK-LABEL: test_select_reg:
; CHECK:       # %bb.0:
; CHECK-NEXT:    shl $m0, $m0, 31
; CHECK-NEXT:    shrs $m0, $m0, 31
; CHECK-NEXT:    brz $m0, .LBB0_1
; CHECK-NEXT:  # %bb.2:
; CHECK-NEXT:    brz $m0, .LBB0_3
; CHECK-NEXT:  .LBB0_4:
; CHECK-NEXT:    br $m10
; CHECK-NEXT:  .LBB0_1:
; CHECK-NEXT:    mov $a0:1, $a4:5
; CHECK-NEXT:    brnz $m0, .LBB0_4
; CHECK-NEXT:  .LBB0_3:
; CHECK-NEXT:    ld64 $a2:3, $m11, $m15, 0
; CHECK-NEXT:    br $m10
  %1 = select i1 %cond, <4 x float> %t, <4 x float> %f
  ret <4 x float> %1
}

define <4 x float> @test_select_reg_true(i1 %cond, <4 x float> %t) {
; CHECK-LABEL: test_select_reg_true:
; CHECK:       # %bb.0:
; CHECK-NEXT:    shl $m0, $m0, 31
; CHECK-NEXT:    shrs $m0, $m0, 31
; CHECK-NEXT:    brnz $m0, .LBB1_2
; CHECK-NEXT:  # %bb.1:
; CHECK-NEXT:    or $a0, $a15, 1073741824
; CHECK-NEXT:    or $a1, $a15, 1077936128
; CHECK-NEXT:  .LBB1_2:
; CHECK-NEXT:    br $m10
  %tmp = insertelement <4 x float> undef, float 2.0, i32 0
  %local = insertelement <4 x float> %tmp, float 3.0, i32 1
  %1 = select i1 %cond, <4 x float> %t, <4 x float> %local
  ret <4 x float> %1
}

define <4 x float> @test_select_reg_true_regmove(i1 %cond, float %ignore, <4 x float> %t) {
; CHECK-LABEL: test_select_reg_true_regmove:
; CHECK:       # %bb.0:
; CHECK-NEXT:    mov $a0:1, $a2:3
; CHECK-NEXT:    shl $m0, $m0, 31
; CHECK-NEXT:    shrs $m0, $m0, 31
; CHECK-NEXT:    brnz $m0, .LBB2_2
; CHECK-NEXT:  # %bb.1:
; CHECK-NEXT:    or $a0, $a15, 1073741824
; CHECK-NEXT:    or $a1, $a15, 1077936128
; CHECK-NEXT:  .LBB2_2:
; CHECK-NEXT:    mov $a2:3, $a4:5
; CHECK-NEXT:    br $m10
  %tmp = insertelement <4 x float> undef, float 2.0, i32 0
  %local = insertelement <4 x float> %tmp, float 3.0, i32 1
  %1 = select i1 %cond, <4 x float> %t, <4 x float> %local
  ret <4 x float> %1
}

define <4 x float> @test_select_reg_false(i1 %cond, <4 x float> %f) {
; CHECK-LABEL: test_select_reg_false:
; CHECK:       # %bb.0:
; CHECK-NEXT:    shl $m0, $m0, 31
; CHECK-NEXT:    shrs $m0, $m0, 31
; CHECK-NEXT:    brz $m0, .LBB3_2
; CHECK-NEXT:  # %bb.1:
; CHECK-NEXT:    or $a0, $a15, 1073741824
; CHECK-NEXT:    or $a1, $a15, 1077936128
; CHECK-NEXT:  .LBB3_2:
; CHECK-NEXT:    br $m10
  %tmp = insertelement <4 x float> undef, float 2.0, i32 0
  %local = insertelement <4 x float> %tmp, float 3.0, i32 1
  %1 = select i1 %cond, <4 x float> %local, <4 x float> %f
  ret <4 x float> %1
}

define <4 x float> @test_select_reg_false_regmove(i1 %cond, float %ignore, <4 x float> %f) {
; CHECK-LABEL: test_select_reg_false_regmove:
; CHECK:       # %bb.0:
; CHECK-NEXT:    mov $a0:1, $a2:3
; CHECK-NEXT:    shl $m0, $m0, 31
; CHECK-NEXT:    shrs $m0, $m0, 31
; CHECK-NEXT:    brz $m0, .LBB4_2
; CHECK-NEXT:  # %bb.1:
; CHECK-NEXT:    or $a0, $a15, 1073741824
; CHECK-NEXT:    or $a1, $a15, 1077936128
; CHECK-NEXT:  .LBB4_2:
; CHECK-NEXT:    mov $a2:3, $a4:5
; CHECK-NEXT:    br $m10
  %tmp = insertelement <4 x float> undef, float 2.0, i32 0
  %local = insertelement <4 x float> %tmp, float 3.0, i32 1
  %1 = select i1 %cond, <4 x float> %local, <4 x float> %f
  ret <4 x float> %1
}