; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -march=colossus -mattr=+ipu1 -colossus-coissue=false | FileCheck %s
; RUN: llc < %s -march=colossus -mattr=+ipu2 -colossus-coissue=false | FileCheck %s
target triple = "colossus-graphcore--elf"

define <4 x i1> @icmp_eq_v4i16(<4 x i16> %lhs, <4 x i16> %rhs) {
; CHECK-LABEL: icmp_eq_v4i16:
; CHECK:       # %bb.0:
; CHECK-NEXT:    sort4x16hi $m4, $m3, $m15
; CHECK-NEXT:    sort4x16hi $m5, $m1, $m15
; CHECK-NEXT:    cmpeq $m4, $m5, $m4
; CHECK-NEXT:    shl $m4, $m4, 31
; CHECK-NEXT:    shrs $m4, $m4, 31
; CHECK-NEXT:    sort4x16lo $m3, $m3, $m15
; CHECK-NEXT:    sort4x16lo $m1, $m1, $m15
; CHECK-NEXT:    cmpeq $m1, $m1, $m3
; CHECK-NEXT:    shl $m1, $m1, 31
; CHECK-NEXT:    shrs $m1, $m1, 31
; CHECK-NEXT:    sort4x16lo $m1, $m1, $m4
; CHECK-NEXT:    sort4x16hi $m3, $m2, $m15
; CHECK-NEXT:    sort4x16hi $m4, $m0, $m15
; CHECK-NEXT:    cmpeq $m3, $m4, $m3
; CHECK-NEXT:    shl $m3, $m3, 31
; CHECK-NEXT:    shrs $m3, $m3, 31
; CHECK-NEXT:    sort4x16lo $m2, $m2, $m15
; CHECK-NEXT:    sort4x16lo $m0, $m0, $m15
; CHECK-NEXT:    cmpeq $m0, $m0, $m2
; CHECK-NEXT:    shl $m0, $m0, 31
; CHECK-NEXT:    shrs $m0, $m0, 31
; CHECK-NEXT:    sort4x16lo $m0, $m0, $m3
; CHECK-NEXT:    br $m10
  %retval = icmp eq <4 x i16> %lhs, %rhs
  ret <4 x i1> %retval
}

define <4 x i1> @icmp_ne_v4i16(<4 x i16> %lhs, <4 x i16> %rhs) {
; CHECK-LABEL: icmp_ne_v4i16:
; CHECK:       # %bb.0:
; CHECK-NEXT:    sort4x16hi $m4, $m3, $m15
; CHECK-NEXT:    sort4x16hi $m5, $m1, $m15
; CHECK-NEXT:    cmpne $m4, $m5, $m4
; CHECK-NEXT:    shl $m4, $m4, 31
; CHECK-NEXT:    shrs $m4, $m4, 31
; CHECK-NEXT:    sort4x16lo $m3, $m3, $m15
; CHECK-NEXT:    sort4x16lo $m1, $m1, $m15
; CHECK-NEXT:    cmpne $m1, $m1, $m3
; CHECK-NEXT:    shl $m1, $m1, 31
; CHECK-NEXT:    shrs $m1, $m1, 31
; CHECK-NEXT:    sort4x16lo $m1, $m1, $m4
; CHECK-NEXT:    sort4x16hi $m3, $m2, $m15
; CHECK-NEXT:    sort4x16hi $m4, $m0, $m15
; CHECK-NEXT:    cmpne $m3, $m4, $m3
; CHECK-NEXT:    shl $m3, $m3, 31
; CHECK-NEXT:    shrs $m3, $m3, 31
; CHECK-NEXT:    sort4x16lo $m2, $m2, $m15
; CHECK-NEXT:    sort4x16lo $m0, $m0, $m15
; CHECK-NEXT:    cmpne $m0, $m0, $m2
; CHECK-NEXT:    shl $m0, $m0, 31
; CHECK-NEXT:    shrs $m0, $m0, 31
; CHECK-NEXT:    sort4x16lo $m0, $m0, $m3
; CHECK-NEXT:    br $m10
  %retval = icmp ne <4 x i16> %lhs, %rhs
  ret <4 x i1> %retval
}

define <4 x i1> @icmp_ugt_v4i16(<4 x i16> %lhs, <4 x i16> %rhs) {
; CHECK-LABEL: icmp_ugt_v4i16:
; CHECK:       # %bb.0:
; CHECK-NEXT:    sort4x16hi $m4, $m1, $m15
; CHECK-NEXT:    sort4x16hi $m5, $m3, $m15
; CHECK-NEXT:    cmpult $m4, $m5, $m4
; CHECK-NEXT:    shl $m4, $m4, 31
; CHECK-NEXT:    shrs $m4, $m4, 31
; CHECK-NEXT:    sort4x16lo $m1, $m1, $m15
; CHECK-NEXT:    sort4x16lo $m3, $m3, $m15
; CHECK-NEXT:    cmpult $m1, $m3, $m1
; CHECK-NEXT:    shl $m1, $m1, 31
; CHECK-NEXT:    shrs $m1, $m1, 31
; CHECK-NEXT:    sort4x16lo $m1, $m1, $m4
; CHECK-NEXT:    sort4x16hi $m3, $m0, $m15
; CHECK-NEXT:    sort4x16hi $m4, $m2, $m15
; CHECK-NEXT:    cmpult $m3, $m4, $m3
; CHECK-NEXT:    shl $m3, $m3, 31
; CHECK-NEXT:    shrs $m3, $m3, 31
; CHECK-NEXT:    sort4x16lo $m0, $m0, $m15
; CHECK-NEXT:    sort4x16lo $m2, $m2, $m15
; CHECK-NEXT:    cmpult $m0, $m2, $m0
; CHECK-NEXT:    shl $m0, $m0, 31
; CHECK-NEXT:    shrs $m0, $m0, 31
; CHECK-NEXT:    sort4x16lo $m0, $m0, $m3
; CHECK-NEXT:    br $m10
  %retval = icmp ugt <4 x i16> %lhs, %rhs
  ret <4 x i1> %retval
}

define <4 x i1> @icmp_uge_v4i16(<4 x i16> %lhs, <4 x i16> %rhs) {
; CHECK-LABEL: icmp_uge_v4i16:
; CHECK:       # %bb.0:
; CHECK-NEXT:    sort4x16hi $m4, $m3, $m15
; CHECK-NEXT:    sort4x16hi $m5, $m1, $m15
; CHECK-NEXT:    cmpult $m4, $m5, $m4
; CHECK-NEXT:    cmpeq $m4, $m4, 0
; CHECK-NEXT:    shl $m4, $m4, 31
; CHECK-NEXT:    shrs $m4, $m4, 31
; CHECK-NEXT:    sort4x16lo $m3, $m3, $m15
; CHECK-NEXT:    sort4x16lo $m1, $m1, $m15
; CHECK-NEXT:    cmpult $m1, $m1, $m3
; CHECK-NEXT:    cmpeq $m1, $m1, 0
; CHECK-NEXT:    shl $m1, $m1, 31
; CHECK-NEXT:    shrs $m1, $m1, 31
; CHECK-NEXT:    sort4x16lo $m1, $m1, $m4
; CHECK-NEXT:    sort4x16hi $m3, $m2, $m15
; CHECK-NEXT:    sort4x16hi $m4, $m0, $m15
; CHECK-NEXT:    cmpult $m3, $m4, $m3
; CHECK-NEXT:    cmpeq $m3, $m3, 0
; CHECK-NEXT:    shl $m3, $m3, 31
; CHECK-NEXT:    shrs $m3, $m3, 31
; CHECK-NEXT:    sort4x16lo $m2, $m2, $m15
; CHECK-NEXT:    sort4x16lo $m0, $m0, $m15
; CHECK-NEXT:    cmpult $m0, $m0, $m2
; CHECK-NEXT:    cmpeq $m0, $m0, 0
; CHECK-NEXT:    shl $m0, $m0, 31
; CHECK-NEXT:    shrs $m0, $m0, 31
; CHECK-NEXT:    sort4x16lo $m0, $m0, $m3
; CHECK-NEXT:    br $m10
  %retval = icmp uge <4 x i16> %lhs, %rhs
  ret <4 x i1> %retval
}

define <4 x i1> @icmp_ult_v4i16(<4 x i16> %lhs, <4 x i16> %rhs) {
; CHECK-LABEL: icmp_ult_v4i16:
; CHECK:       # %bb.0:
; CHECK-NEXT:    sort4x16hi $m4, $m3, $m15
; CHECK-NEXT:    sort4x16hi $m5, $m1, $m15
; CHECK-NEXT:    cmpult $m4, $m5, $m4
; CHECK-NEXT:    shl $m4, $m4, 31
; CHECK-NEXT:    shrs $m4, $m4, 31
; CHECK-NEXT:    sort4x16lo $m3, $m3, $m15
; CHECK-NEXT:    sort4x16lo $m1, $m1, $m15
; CHECK-NEXT:    cmpult $m1, $m1, $m3
; CHECK-NEXT:    shl $m1, $m1, 31
; CHECK-NEXT:    shrs $m1, $m1, 31
; CHECK-NEXT:    sort4x16lo $m1, $m1, $m4
; CHECK-NEXT:    sort4x16hi $m3, $m2, $m15
; CHECK-NEXT:    sort4x16hi $m4, $m0, $m15
; CHECK-NEXT:    cmpult $m3, $m4, $m3
; CHECK-NEXT:    shl $m3, $m3, 31
; CHECK-NEXT:    shrs $m3, $m3, 31
; CHECK-NEXT:    sort4x16lo $m2, $m2, $m15
; CHECK-NEXT:    sort4x16lo $m0, $m0, $m15
; CHECK-NEXT:    cmpult $m0, $m0, $m2
; CHECK-NEXT:    shl $m0, $m0, 31
; CHECK-NEXT:    shrs $m0, $m0, 31
; CHECK-NEXT:    sort4x16lo $m0, $m0, $m3
; CHECK-NEXT:    br $m10
  %retval = icmp ult <4 x i16> %lhs, %rhs
  ret <4 x i1> %retval
}

define <4 x i1> @icmp_ule_v4i16(<4 x i16> %lhs, <4 x i16> %rhs) {
; CHECK-LABEL: icmp_ule_v4i16:
; CHECK:       # %bb.0:
; CHECK-NEXT:    sort4x16hi $m4, $m1, $m15
; CHECK-NEXT:    sort4x16hi $m5, $m3, $m15
; CHECK-NEXT:    cmpult $m4, $m5, $m4
; CHECK-NEXT:    cmpeq $m4, $m4, 0
; CHECK-NEXT:    shl $m4, $m4, 31
; CHECK-NEXT:    shrs $m4, $m4, 31
; CHECK-NEXT:    sort4x16lo $m1, $m1, $m15
; CHECK-NEXT:    sort4x16lo $m3, $m3, $m15
; CHECK-NEXT:    cmpult $m1, $m3, $m1
; CHECK-NEXT:    cmpeq $m1, $m1, 0
; CHECK-NEXT:    shl $m1, $m1, 31
; CHECK-NEXT:    shrs $m1, $m1, 31
; CHECK-NEXT:    sort4x16lo $m1, $m1, $m4
; CHECK-NEXT:    sort4x16hi $m3, $m0, $m15
; CHECK-NEXT:    sort4x16hi $m4, $m2, $m15
; CHECK-NEXT:    cmpult $m3, $m4, $m3
; CHECK-NEXT:    cmpeq $m3, $m3, 0
; CHECK-NEXT:    shl $m3, $m3, 31
; CHECK-NEXT:    shrs $m3, $m3, 31
; CHECK-NEXT:    sort4x16lo $m0, $m0, $m15
; CHECK-NEXT:    sort4x16lo $m2, $m2, $m15
; CHECK-NEXT:    cmpult $m0, $m2, $m0
; CHECK-NEXT:    cmpeq $m0, $m0, 0
; CHECK-NEXT:    shl $m0, $m0, 31
; CHECK-NEXT:    shrs $m0, $m0, 31
; CHECK-NEXT:    sort4x16lo $m0, $m0, $m3
; CHECK-NEXT:    br $m10
  %retval = icmp ule <4 x i16> %lhs, %rhs
  ret <4 x i1> %retval
}

define <4 x i1> @icmp_sgt_v4i16(<4 x i16> %lhs, <4 x i16> %rhs) {
; CHECK-LABEL: icmp_sgt_v4i16:
; CHECK:       # %bb.0:
; CHECK-NEXT:    shrs $m4, $m1, 16
; CHECK-NEXT:    shrs $m5, $m3, 16
; CHECK-NEXT:    cmpslt $m4, $m5, $m4
; CHECK-NEXT:    shl $m4, $m4, 31
; CHECK-NEXT:    shrs $m4, $m4, 31
; CHECK-NEXT:    shl $m1, $m1, 16
; CHECK-NEXT:    shrs $m1, $m1, 16
; CHECK-NEXT:    shl $m3, $m3, 16
; CHECK-NEXT:    shrs $m3, $m3, 16
; CHECK-NEXT:    cmpslt $m1, $m3, $m1
; CHECK-NEXT:    shl $m1, $m1, 31
; CHECK-NEXT:    shrs $m1, $m1, 31
; CHECK-NEXT:    sort4x16lo $m1, $m1, $m4
; CHECK-NEXT:    shrs $m3, $m0, 16
; CHECK-NEXT:    shrs $m4, $m2, 16
; CHECK-NEXT:    cmpslt $m3, $m4, $m3
; CHECK-NEXT:    shl $m3, $m3, 31
; CHECK-NEXT:    shrs $m3, $m3, 31
; CHECK-NEXT:    shl $m0, $m0, 16
; CHECK-NEXT:    shrs $m0, $m0, 16
; CHECK-NEXT:    shl $m2, $m2, 16
; CHECK-NEXT:    shrs $m2, $m2, 16
; CHECK-NEXT:    cmpslt $m0, $m2, $m0
; CHECK-NEXT:    shl $m0, $m0, 31
; CHECK-NEXT:    shrs $m0, $m0, 31
; CHECK-NEXT:    sort4x16lo $m0, $m0, $m3
; CHECK-NEXT:    br $m10
  %retval = icmp sgt <4 x i16> %lhs, %rhs
  ret <4 x i1> %retval
}

define <4 x i1> @icmp_sge_v4i16(<4 x i16> %lhs, <4 x i16> %rhs) {
; CHECK-LABEL: icmp_sge_v4i16:
; CHECK:       # %bb.0:
; CHECK-NEXT:    shrs $m4, $m3, 16
; CHECK-NEXT:    shrs $m5, $m1, 16
; CHECK-NEXT:    cmpslt $m4, $m5, $m4
; CHECK-NEXT:    cmpeq $m4, $m4, 0
; CHECK-NEXT:    shl $m4, $m4, 31
; CHECK-NEXT:    shrs $m4, $m4, 31
; CHECK-NEXT:    shl $m3, $m3, 16
; CHECK-NEXT:    shrs $m3, $m3, 16
; CHECK-NEXT:    shl $m1, $m1, 16
; CHECK-NEXT:    shrs $m1, $m1, 16
; CHECK-NEXT:    cmpslt $m1, $m1, $m3
; CHECK-NEXT:    cmpeq $m1, $m1, 0
; CHECK-NEXT:    shl $m1, $m1, 31
; CHECK-NEXT:    shrs $m1, $m1, 31
; CHECK-NEXT:    sort4x16lo $m1, $m1, $m4
; CHECK-NEXT:    shrs $m3, $m2, 16
; CHECK-NEXT:    shrs $m4, $m0, 16
; CHECK-NEXT:    cmpslt $m3, $m4, $m3
; CHECK-NEXT:    cmpeq $m3, $m3, 0
; CHECK-NEXT:    shl $m3, $m3, 31
; CHECK-NEXT:    shrs $m3, $m3, 31
; CHECK-NEXT:    shl $m2, $m2, 16
; CHECK-NEXT:    shrs $m2, $m2, 16
; CHECK-NEXT:    shl $m0, $m0, 16
; CHECK-NEXT:    shrs $m0, $m0, 16
; CHECK-NEXT:    cmpslt $m0, $m0, $m2
; CHECK-NEXT:    cmpeq $m0, $m0, 0
; CHECK-NEXT:    shl $m0, $m0, 31
; CHECK-NEXT:    shrs $m0, $m0, 31
; CHECK-NEXT:    sort4x16lo $m0, $m0, $m3
; CHECK-NEXT:    br $m10
  %retval = icmp sge <4 x i16> %lhs, %rhs
  ret <4 x i1> %retval
}

define <4 x i1> @icmp_slt_v4i16(<4 x i16> %lhs, <4 x i16> %rhs) {
; CHECK-LABEL: icmp_slt_v4i16:
; CHECK:       # %bb.0:
; CHECK-NEXT:    shrs $m4, $m3, 16
; CHECK-NEXT:    shrs $m5, $m1, 16
; CHECK-NEXT:    cmpslt $m4, $m5, $m4
; CHECK-NEXT:    shl $m4, $m4, 31
; CHECK-NEXT:    shrs $m4, $m4, 31
; CHECK-NEXT:    shl $m3, $m3, 16
; CHECK-NEXT:    shrs $m3, $m3, 16
; CHECK-NEXT:    shl $m1, $m1, 16
; CHECK-NEXT:    shrs $m1, $m1, 16
; CHECK-NEXT:    cmpslt $m1, $m1, $m3
; CHECK-NEXT:    shl $m1, $m1, 31
; CHECK-NEXT:    shrs $m1, $m1, 31
; CHECK-NEXT:    sort4x16lo $m1, $m1, $m4
; CHECK-NEXT:    shrs $m3, $m2, 16
; CHECK-NEXT:    shrs $m4, $m0, 16
; CHECK-NEXT:    cmpslt $m3, $m4, $m3
; CHECK-NEXT:    shl $m3, $m3, 31
; CHECK-NEXT:    shrs $m3, $m3, 31
; CHECK-NEXT:    shl $m2, $m2, 16
; CHECK-NEXT:    shrs $m2, $m2, 16
; CHECK-NEXT:    shl $m0, $m0, 16
; CHECK-NEXT:    shrs $m0, $m0, 16
; CHECK-NEXT:    cmpslt $m0, $m0, $m2
; CHECK-NEXT:    shl $m0, $m0, 31
; CHECK-NEXT:    shrs $m0, $m0, 31
; CHECK-NEXT:    sort4x16lo $m0, $m0, $m3
; CHECK-NEXT:    br $m10
  %retval = icmp slt <4 x i16> %lhs, %rhs
  ret <4 x i1> %retval
}

define <4 x i1> @icmp_sle_v4i16(<4 x i16> %lhs, <4 x i16> %rhs) {
; CHECK-LABEL: icmp_sle_v4i16:
; CHECK:       # %bb.0:
; CHECK-NEXT:    shrs $m4, $m1, 16
; CHECK-NEXT:    shrs $m5, $m3, 16
; CHECK-NEXT:    cmpslt $m4, $m5, $m4
; CHECK-NEXT:    cmpeq $m4, $m4, 0
; CHECK-NEXT:    shl $m4, $m4, 31
; CHECK-NEXT:    shrs $m4, $m4, 31
; CHECK-NEXT:    shl $m1, $m1, 16
; CHECK-NEXT:    shrs $m1, $m1, 16
; CHECK-NEXT:    shl $m3, $m3, 16
; CHECK-NEXT:    shrs $m3, $m3, 16
; CHECK-NEXT:    cmpslt $m1, $m3, $m1
; CHECK-NEXT:    cmpeq $m1, $m1, 0
; CHECK-NEXT:    shl $m1, $m1, 31
; CHECK-NEXT:    shrs $m1, $m1, 31
; CHECK-NEXT:    sort4x16lo $m1, $m1, $m4
; CHECK-NEXT:    shrs $m3, $m0, 16
; CHECK-NEXT:    shrs $m4, $m2, 16
; CHECK-NEXT:    cmpslt $m3, $m4, $m3
; CHECK-NEXT:    cmpeq $m3, $m3, 0
; CHECK-NEXT:    shl $m3, $m3, 31
; CHECK-NEXT:    shrs $m3, $m3, 31
; CHECK-NEXT:    shl $m0, $m0, 16
; CHECK-NEXT:    shrs $m0, $m0, 16
; CHECK-NEXT:    shl $m2, $m2, 16
; CHECK-NEXT:    shrs $m2, $m2, 16
; CHECK-NEXT:    cmpslt $m0, $m2, $m0
; CHECK-NEXT:    cmpeq $m0, $m0, 0
; CHECK-NEXT:    shl $m0, $m0, 31
; CHECK-NEXT:    shrs $m0, $m0, 31
; CHECK-NEXT:    sort4x16lo $m0, $m0, $m3
; CHECK-NEXT:    br $m10
  %retval = icmp sle <4 x i16> %lhs, %rhs
  ret <4 x i1> %retval
}