# RUN: llvm-mc %s -filetype=obj  -mattr=+ipu21 | \
# RUN: llvm-objdump -d --mcpu=ipu21 - | FileCheck %s

# This file is auto-generated. Do not edit.
# Generated by GenerateInsnTest.py.

# Test that we can objdump all variants of the `f32v2aop` instruction
# declared in Isa.xml.

# CHECK: 00 0c 00 5a f32v2aop $a0:1, $a0:1, 0
.int 0x5a000c00

# CHECK: 00 2c 00 5a f32v2aop $a0:1, $a2:3, 0
.int 0x5a002c00

# CHECK: 00 4c 00 5a f32v2aop $a0:1, $a4:5, 0
.int 0x5a004c00

# CHECK: 00 6c 00 5a f32v2aop $a0:1, $a6:7, 0
.int 0x5a006c00

# CHECK: 00 8c 00 5a f32v2aop $a0:1, $a8:9, 0
.int 0x5a008c00

# CHECK: 00 ac 00 5a f32v2aop $a0:1, $a10:11, 0
.int 0x5a00ac00

# CHECK: 00 cc 00 5a f32v2aop $a0:1, $a12:13, 0
.int 0x5a00cc00

# CHECK: 00 ec 00 5a f32v2aop $a0:1, $a14:15, 0
.int 0x5a00ec00

# CHECK: 00 0c 20 5a f32v2aop $a2:3, $a0:1, 0
.int 0x5a200c00

# CHECK: 00 2c 20 5a f32v2aop $a2:3, $a2:3, 0
.int 0x5a202c00

# CHECK: 00 4c 20 5a f32v2aop $a2:3, $a4:5, 0
.int 0x5a204c00

# CHECK: 00 6c 20 5a f32v2aop $a2:3, $a6:7, 0
.int 0x5a206c00

# CHECK: 00 8c 20 5a f32v2aop $a2:3, $a8:9, 0
.int 0x5a208c00

# CHECK: 00 ac 20 5a f32v2aop $a2:3, $a10:11, 0
.int 0x5a20ac00

# CHECK: 00 cc 20 5a f32v2aop $a2:3, $a12:13, 0
.int 0x5a20cc00

# CHECK: 00 ec 20 5a f32v2aop $a2:3, $a14:15, 0
.int 0x5a20ec00

# CHECK: 00 0c 40 5a f32v2aop $a4:5, $a0:1, 0
.int 0x5a400c00

# CHECK: 00 2c 40 5a f32v2aop $a4:5, $a2:3, 0
.int 0x5a402c00

# CHECK: 00 4c 40 5a f32v2aop $a4:5, $a4:5, 0
.int 0x5a404c00

# CHECK: 00 6c 40 5a f32v2aop $a4:5, $a6:7, 0
.int 0x5a406c00

# CHECK: 00 8c 40 5a f32v2aop $a4:5, $a8:9, 0
.int 0x5a408c00

# CHECK: 00 ac 40 5a f32v2aop $a4:5, $a10:11, 0
.int 0x5a40ac00

# CHECK: 00 cc 40 5a f32v2aop $a4:5, $a12:13, 0
.int 0x5a40cc00

# CHECK: 00 ec 40 5a f32v2aop $a4:5, $a14:15, 0
.int 0x5a40ec00

# CHECK: 00 0c 60 5a f32v2aop $a6:7, $a0:1, 0
.int 0x5a600c00

# CHECK: 00 2c 60 5a f32v2aop $a6:7, $a2:3, 0
.int 0x5a602c00

# CHECK: 00 4c 60 5a f32v2aop $a6:7, $a4:5, 0
.int 0x5a604c00

# CHECK: 00 6c 60 5a f32v2aop $a6:7, $a6:7, 0
.int 0x5a606c00

# CHECK: 00 8c 60 5a f32v2aop $a6:7, $a8:9, 0
.int 0x5a608c00

# CHECK: 00 ac 60 5a f32v2aop $a6:7, $a10:11, 0
.int 0x5a60ac00

# CHECK: 00 cc 60 5a f32v2aop $a6:7, $a12:13, 0
.int 0x5a60cc00

# CHECK: 00 ec 60 5a f32v2aop $a6:7, $a14:15, 0
.int 0x5a60ec00

# CHECK: 00 0c 80 5a f32v2aop $a8:9, $a0:1, 0
.int 0x5a800c00

# CHECK: 00 2c 80 5a f32v2aop $a8:9, $a2:3, 0
.int 0x5a802c00

# CHECK: 00 4c 80 5a f32v2aop $a8:9, $a4:5, 0
.int 0x5a804c00

# CHECK: 00 6c 80 5a f32v2aop $a8:9, $a6:7, 0
.int 0x5a806c00

# CHECK: 00 8c 80 5a f32v2aop $a8:9, $a8:9, 0
.int 0x5a808c00

# CHECK: 00 ac 80 5a f32v2aop $a8:9, $a10:11, 0
.int 0x5a80ac00

# CHECK: 00 cc 80 5a f32v2aop $a8:9, $a12:13, 0
.int 0x5a80cc00

# CHECK: 00 ec 80 5a f32v2aop $a8:9, $a14:15, 0
.int 0x5a80ec00

# CHECK: 00 0c a0 5a f32v2aop $a10:11, $a0:1, 0
.int 0x5aa00c00

# CHECK: 00 2c a0 5a f32v2aop $a10:11, $a2:3, 0
.int 0x5aa02c00

# CHECK: 00 4c a0 5a f32v2aop $a10:11, $a4:5, 0
.int 0x5aa04c00

# CHECK: 00 6c a0 5a f32v2aop $a10:11, $a6:7, 0
.int 0x5aa06c00

# CHECK: 00 8c a0 5a f32v2aop $a10:11, $a8:9, 0
.int 0x5aa08c00

# CHECK: 00 ac a0 5a f32v2aop $a10:11, $a10:11, 0
.int 0x5aa0ac00

# CHECK: 00 cc a0 5a f32v2aop $a10:11, $a12:13, 0
.int 0x5aa0cc00

# CHECK: 00 ec a0 5a f32v2aop $a10:11, $a14:15, 0
.int 0x5aa0ec00

# CHECK: 00 0c c0 5a f32v2aop $a12:13, $a0:1, 0
.int 0x5ac00c00

# CHECK: 00 2c c0 5a f32v2aop $a12:13, $a2:3, 0
.int 0x5ac02c00

# CHECK: 00 4c c0 5a f32v2aop $a12:13, $a4:5, 0
.int 0x5ac04c00

# CHECK: 00 6c c0 5a f32v2aop $a12:13, $a6:7, 0
.int 0x5ac06c00

# CHECK: 00 8c c0 5a f32v2aop $a12:13, $a8:9, 0
.int 0x5ac08c00

# CHECK: 00 ac c0 5a f32v2aop $a12:13, $a10:11, 0
.int 0x5ac0ac00

# CHECK: 00 cc c0 5a f32v2aop $a12:13, $a12:13, 0
.int 0x5ac0cc00

# CHECK: 00 ec c0 5a f32v2aop $a12:13, $a14:15, 0
.int 0x5ac0ec00

# CHECK: 00 0c e0 5a f32v2aop $a14:15, $a0:1, 0
.int 0x5ae00c00

# CHECK: 00 2c e0 5a f32v2aop $a14:15, $a2:3, 0
.int 0x5ae02c00

# CHECK: 00 4c e0 5a f32v2aop $a14:15, $a4:5, 0
.int 0x5ae04c00

# CHECK: 00 6c e0 5a f32v2aop $a14:15, $a6:7, 0
.int 0x5ae06c00

# CHECK: 00 8c e0 5a f32v2aop $a14:15, $a8:9, 0
.int 0x5ae08c00

# CHECK: 00 ac e0 5a f32v2aop $a14:15, $a10:11, 0
.int 0x5ae0ac00

# CHECK: 00 cc e0 5a f32v2aop $a14:15, $a12:13, 0
.int 0x5ae0cc00

# CHECK: 00 ec e0 5a f32v2aop $a14:15, $a14:15, 0
.int 0x5ae0ec00