# RUN: llvm-mc %s -filetype=obj  -mattr=+ipu21 | \
# RUN: llvm-objdump -d --mcpu=ipu21 - | FileCheck %s

# This file is auto-generated. Do not edit.
# Generated by GenerateInsnTest.py.

# Test that we can objdump all variants of the `f32v2gina` instruction
# declared in Isa.xml.

# CHECK: 00 40 00 59 f32v2gina $a0:1, $a0:1, 0
.int 0x59004000

# CHECK: 00 40 20 59 f32v2gina $a0:1, $a2:3, 0
.int 0x59204000

# CHECK: 00 40 40 59 f32v2gina $a0:1, $a4:5, 0
.int 0x59404000

# CHECK: 00 40 60 59 f32v2gina $a0:1, $a6:7, 0
.int 0x59604000

# CHECK: 00 40 80 59 f32v2gina $a0:1, $a8:9, 0
.int 0x59804000

# CHECK: 00 40 a0 59 f32v2gina $a0:1, $a10:11, 0
.int 0x59a04000

# CHECK: 00 40 c0 59 f32v2gina $a0:1, $a12:13, 0
.int 0x59c04000

# CHECK: 00 40 e0 59 f32v2gina $a0:1, $a14:15, 0
.int 0x59e04000

# CHECK: 00 40 02 59 f32v2gina $a2:3, $a0:1, 0
.int 0x59024000

# CHECK: 00 40 22 59 f32v2gina $a2:3, $a2:3, 0
.int 0x59224000

# CHECK: 00 40 42 59 f32v2gina $a2:3, $a4:5, 0
.int 0x59424000

# CHECK: 00 40 62 59 f32v2gina $a2:3, $a6:7, 0
.int 0x59624000

# CHECK: 00 40 82 59 f32v2gina $a2:3, $a8:9, 0
.int 0x59824000

# CHECK: 00 40 a2 59 f32v2gina $a2:3, $a10:11, 0
.int 0x59a24000

# CHECK: 00 40 c2 59 f32v2gina $a2:3, $a12:13, 0
.int 0x59c24000

# CHECK: 00 40 e2 59 f32v2gina $a2:3, $a14:15, 0
.int 0x59e24000

# CHECK: 00 40 04 59 f32v2gina $a4:5, $a0:1, 0
.int 0x59044000

# CHECK: 00 40 24 59 f32v2gina $a4:5, $a2:3, 0
.int 0x59244000

# CHECK: 00 40 44 59 f32v2gina $a4:5, $a4:5, 0
.int 0x59444000

# CHECK: 00 40 64 59 f32v2gina $a4:5, $a6:7, 0
.int 0x59644000

# CHECK: 00 40 84 59 f32v2gina $a4:5, $a8:9, 0
.int 0x59844000

# CHECK: 00 40 a4 59 f32v2gina $a4:5, $a10:11, 0
.int 0x59a44000

# CHECK: 00 40 c4 59 f32v2gina $a4:5, $a12:13, 0
.int 0x59c44000

# CHECK: 00 40 e4 59 f32v2gina $a4:5, $a14:15, 0
.int 0x59e44000

# CHECK: 00 40 06 59 f32v2gina $a6:7, $a0:1, 0
.int 0x59064000

# CHECK: 00 40 26 59 f32v2gina $a6:7, $a2:3, 0
.int 0x59264000

# CHECK: 00 40 46 59 f32v2gina $a6:7, $a4:5, 0
.int 0x59464000

# CHECK: 00 40 66 59 f32v2gina $a6:7, $a6:7, 0
.int 0x59664000

# CHECK: 00 40 86 59 f32v2gina $a6:7, $a8:9, 0
.int 0x59864000

# CHECK: 00 40 a6 59 f32v2gina $a6:7, $a10:11, 0
.int 0x59a64000

# CHECK: 00 40 c6 59 f32v2gina $a6:7, $a12:13, 0
.int 0x59c64000

# CHECK: 00 40 e6 59 f32v2gina $a6:7, $a14:15, 0
.int 0x59e64000

# CHECK: 00 40 08 59 f32v2gina $a8:9, $a0:1, 0
.int 0x59084000

# CHECK: 00 40 28 59 f32v2gina $a8:9, $a2:3, 0
.int 0x59284000

# CHECK: 00 40 48 59 f32v2gina $a8:9, $a4:5, 0
.int 0x59484000

# CHECK: 00 40 68 59 f32v2gina $a8:9, $a6:7, 0
.int 0x59684000

# CHECK: 00 40 88 59 f32v2gina $a8:9, $a8:9, 0
.int 0x59884000

# CHECK: 00 40 a8 59 f32v2gina $a8:9, $a10:11, 0
.int 0x59a84000

# CHECK: 00 40 c8 59 f32v2gina $a8:9, $a12:13, 0
.int 0x59c84000

# CHECK: 00 40 e8 59 f32v2gina $a8:9, $a14:15, 0
.int 0x59e84000

# CHECK: 00 40 0a 59 f32v2gina $a10:11, $a0:1, 0
.int 0x590a4000

# CHECK: 00 40 2a 59 f32v2gina $a10:11, $a2:3, 0
.int 0x592a4000

# CHECK: 00 40 4a 59 f32v2gina $a10:11, $a4:5, 0
.int 0x594a4000

# CHECK: 00 40 6a 59 f32v2gina $a10:11, $a6:7, 0
.int 0x596a4000

# CHECK: 00 40 8a 59 f32v2gina $a10:11, $a8:9, 0
.int 0x598a4000

# CHECK: 00 40 aa 59 f32v2gina $a10:11, $a10:11, 0
.int 0x59aa4000

# CHECK: 00 40 ca 59 f32v2gina $a10:11, $a12:13, 0
.int 0x59ca4000

# CHECK: 00 40 ea 59 f32v2gina $a10:11, $a14:15, 0
.int 0x59ea4000

# CHECK: 00 40 0c 59 f32v2gina $a12:13, $a0:1, 0
.int 0x590c4000

# CHECK: 00 40 2c 59 f32v2gina $a12:13, $a2:3, 0
.int 0x592c4000

# CHECK: 00 40 4c 59 f32v2gina $a12:13, $a4:5, 0
.int 0x594c4000

# CHECK: 00 40 6c 59 f32v2gina $a12:13, $a6:7, 0
.int 0x596c4000

# CHECK: 00 40 8c 59 f32v2gina $a12:13, $a8:9, 0
.int 0x598c4000

# CHECK: 00 40 ac 59 f32v2gina $a12:13, $a10:11, 0
.int 0x59ac4000

# CHECK: 00 40 cc 59 f32v2gina $a12:13, $a12:13, 0
.int 0x59cc4000

# CHECK: 00 40 ec 59 f32v2gina $a12:13, $a14:15, 0
.int 0x59ec4000

# CHECK: 00 40 0e 59 f32v2gina $a14:15, $a0:1, 0
.int 0x590e4000

# CHECK: 00 40 2e 59 f32v2gina $a14:15, $a2:3, 0
.int 0x592e4000

# CHECK: 00 40 4e 59 f32v2gina $a14:15, $a4:5, 0
.int 0x594e4000

# CHECK: 00 40 6e 59 f32v2gina $a14:15, $a6:7, 0
.int 0x596e4000

# CHECK: 00 40 8e 59 f32v2gina $a14:15, $a8:9, 0
.int 0x598e4000

# CHECK: 00 40 ae 59 f32v2gina $a14:15, $a10:11, 0
.int 0x59ae4000

# CHECK: 00 40 ce 59 f32v2gina $a14:15, $a12:13, 0
.int 0x59ce4000

# CHECK: 00 40 ee 59 f32v2gina $a14:15, $a14:15, 0
.int 0x59ee4000