| ../ | - | |
| WGMMAPrefetch.mlir | 46.1kB | 2026-02-14 16:46:48 |
| accelerate-matmul.mlir | 45.8kB | 2026-02-14 16:46:48 |
| accumulator-init.mlir | 23.9kB | 2026-02-14 16:46:48 |
| amd/ | - | 2026-02-14 16:46:48 |
| atomic-cas.mlir | 1.7kB | 2026-02-14 16:46:48 |
| automatic-warp-specialization.mlir | 7.4kB | 2026-02-14 16:46:48 |
| canonicalize.mlir | 18.4kB | 2026-02-14 16:46:48 |
| coalesce-async-copy.mlir | 2.3kB | 2026-02-14 16:46:48 |
| coalesce.mlir | 11.5kB | 2026-02-14 16:46:48 |
| combine-select-if.mlir | 5.4kB | 2026-02-14 16:46:48 |
| combine.mlir | 272.4kB | 2026-02-14 16:46:48 |
| dot-operands.mlir | 20.4kB | 2026-02-14 16:46:48 |
| fence-inserstion.mlir | 6.3kB | 2026-02-14 16:46:48 |
| fuse-nested-loops.mlir | 23.6kB | 2026-02-14 16:46:48 |
| global_scratch_alloc.mlir | 2.0kB | 2026-02-14 16:46:48 |
| global_scratch_to_llvm.mlir | 931 B | 2026-02-14 16:46:48 |
| hoist-tmem-alloc.mlir | 24.2kB | 2026-02-14 16:46:48 |
| invalid-attributes.mlir | 3.7kB | 2026-02-14 16:46:48 |
| invalid.mlir | 12.3kB | 2026-02-14 16:46:48 |
| load-mma-specialization.mlir | 62.9kB | 2026-02-14 16:46:48 |
| loop-pipeline-async-latencies.mlir | 9.1kB | 2026-02-14 16:46:48 |
| loop-pipeline-blackwell.mlir | 34.0kB | 2026-02-14 16:46:48 |
| loop-pipeline-cuda.mlir | 15.9kB | 2026-02-14 16:46:48 |
| loop-pipeline-expand.mlir | 3.4kB | 2026-02-14 16:46:48 |
| loop-pipeline-hip.mlir | 54.1kB | 2026-02-14 16:46:48 |
| loop-pipeline-hopper-remove-wait.mlir | 15.3kB | 2026-02-14 16:46:48 |
| loop-pipeline-hopper.mlir | 62.2kB | 2026-02-14 16:46:48 |
| loop-pipeline-indirect-load.mlir | 6.9kB | 2026-02-14 16:46:48 |
| loop-pipeline.mlir | 108.4kB | 2026-02-14 16:46:48 |
| loop-schedule.mlir | 11.3kB | 2026-02-14 16:46:48 |
| matmul-loop-pipeline.mlir | 4.2kB | 2026-02-14 16:46:48 |
| matmul.mlir | 6.2kB | 2026-02-14 16:46:48 |
| ops.mlir | 9.5kB | 2026-02-14 16:46:48 |
| optimize-locality.mlir | 45.6kB | 2026-02-14 16:46:48 |
| optimize-partition-warps.mlir | 7.8kB | 2026-02-14 16:46:48 |
| optimize_epilogue.mlir | 1.9kB | 2026-02-14 16:46:48 |
| partition-loops.mlir | 9.4kB | 2026-02-14 16:46:48 |
| pipeline-assign-latencies.mlir | 76.6kB | 2026-02-14 16:46:48 |
| pipeline-loop-nest.mlir | 5.0kB | 2026-02-14 16:46:48 |
| pipeline-lower-loop.mlir | 129.9kB | 2026-02-14 16:46:48 |
| pipeline-schedule-loop.mlir | 62.6kB | 2026-02-14 16:46:48 |
| prefetch.mlir | 27.8kB | 2026-02-14 16:46:48 |
| promote-lhs-to-tmem.mlir | 11.7kB | 2026-02-14 16:46:48 |
| reduce-data-duplication.mlir | 5.8kB | 2026-02-14 16:46:48 |
| reorder-instructions.mlir | 7.8kB | 2026-02-14 16:46:48 |
| rewrite-partition-dependencies.mlir | 20.6kB | 2026-02-14 16:46:48 |
| samples/ | - | 2026-02-14 16:46:48 |
| tf32x3-matmul.mlir | 1.1kB | 2026-02-14 16:46:48 |
| verify-blocked-layout.mlir | 2.8kB | 2026-02-14 16:46:48 |