/* * Copyright (c) 2019 Carlo Caione * * SPDX-License-Identifier: Apache-2.0 */ /** * @file * @brief Cortex-A public exception handling * * ARM-specific kernel exception handling interface. Included by arm64/arch.h. */ #ifndef ZEPHYR_INCLUDE_ARCH_ARM64_EXCEPTION_H_ #define ZEPHYR_INCLUDE_ARCH_ARM64_EXCEPTION_H_ /* for assembler, only works with constants */ #ifdef _ASMLANGUAGE #else #include #ifdef __cplusplus extern "C" { #endif struct __esf { uint64_t x0; uint64_t x1; uint64_t x2; uint64_t x3; uint64_t x4; uint64_t x5; uint64_t x6; uint64_t x7; uint64_t x8; uint64_t x9; uint64_t x10; uint64_t x11; uint64_t x12; uint64_t x13; uint64_t x14; uint64_t x15; uint64_t x16; uint64_t x17; uint64_t x18; uint64_t lr; uint64_t spsr; uint64_t elr; #ifdef CONFIG_ARM64_ENABLE_FRAME_POINTER uint64_t fp; #endif #ifdef CONFIG_ARM64_SAFE_EXCEPTION_STACK uint64_t sp; #endif } __aligned(16); typedef struct __esf z_arch_esf_t; #ifdef __cplusplus } #endif #endif /* _ASMLANGUAGE */ #endif /* ZEPHYR_INCLUDE_ARCH_ARM64_EXCEPTION_H_ */